Archive for January 31st, 2009

Renesas Technology America introduced the dual-core SH7776 (SH-Navi3), a system-on-chip device with enhanced on-chip graphics functions and a high-performance image recognition processing function for next-generation high-end car information terminals.

Strategic Analytics ranks Renesas #1 in the global market for car navigation microprocessors. Renesas said the SH-Navi3 is among the first dual-core SoC products to incorporate an image recognition processing function. IP for image recognition processing was developed jointly with Hitachi, Ltd.

Compared with SH-Navi1 and SH-Navi2, SH-Navi3 delivers approximately 3.5 times faster processing through greater internal parallelism and a doubled bus width. It can execute multiple external environment recognition programs simultaneously - such as lane detection and detection and tracking of preceding vehicles - in real time.

The dual-core architecture supports symmetric multiprocessing (SMP), in which the operations of a single program running under a single OS are divided between two CPU cores for parallel processing, and asymmetric multiprocessing (AMP), in which different operating systems (or multiple instances of the same OS) and completely different programs run on each of the CPU cores.

Integrating two 32-bit SH-4A CPU cores, the SH-Navi3 achieves a processing performance of 1,920 MIPS when operating at 533 MHz. Its 3-D graphics engine incorporates PowerVR SGX IP from 3-D graphics IP specialist Imagination Technologies Limited, and is said to enable polygon performance approximately twice that of PowerVR MBX, which is used in SH-Navi1 and SH-Navi2 devices. Renesas said the extra performance provides support not only for 3-D rendering in navigation applications but also for HMI and other multimedia applications that demand more colorful and realistic 3-D rendering.

The SH7776 also incorporates a 2-D and 3-D graphics processor for detailed map rendering and operation screens that are easier to use. Features include 2-D rendering functions such as bold-line rendering, 3-D rendering functions such as triangle 3-D rendering, for enhanced three-dimensionality, and texture mapping, for more realistic textures. Renesas said the graphics features make it possible to realize a detailed and high-quality GUI incorporating maps, icons, and menus as well as colorfully rendered 3-D objects (such as high-rise buildings) in maps. The SoC‘s distortion compensation module enables transformation into any shape of image data captured by a camera. For example, image data from a camera fitted with a fisheye lens could be used to generate a bird‘s-eye view of the periphery of the vehicle.

A two-channel, 16-bit dedicated bus interface operating at 533 MHz is available for connecting high-speed DDR3-SDRAM, enabling data transfer at up to 4.27 gigabytes per second. Both channels can be accessed at the same time. Dedicated PCI Express interface I/O of allows high-speed transfer of data at up to 250 megabytes per second to and from an external device equipped with a PCI Express interface.

On-chip peripheral modules include a serial ATA interface for high-speed connection to hard disks, an audio encoder, a USB 2.0 Host/Function interface, a TS interface for receiving terrestrial digital TV broadcasts, and a GPS baseband processing module.

Renesas Technology America introduced the dual-core SH7776 (SH-Navi3), a system-on-chip device with enhanced on-chip graphics functions and a high-performance image recognition processing function for next-generation high-end car information terminals.

Strategic Analytics ranks Renesas #1 in the global market for car navigation microprocessors. Renesas said the SH-Navi3 is among the first dual-core SoC products to incorporate an image recognition processing function. IP for image recognition processing was developed jointly with Hitachi, Ltd.

Compared with SH-Navi1 and SH-Navi2, SH-Navi3 delivers approximately 3.5 times faster processing through greater internal parallelism and a doubled bus width. It can execute multiple external environment recognition programs simultaneously - such as lane detection and detection and tracking of preceding vehicles - in real time.

The dual-core architecture supports symmetric multiprocessing (SMP), in which the operations of a single program running under a single OS are divided between two CPU cores for parallel processing, and asymmetric multiprocessing (AMP), in which different operating systems (or multiple instances of the same OS) and completely different programs run on each of the CPU cores.

Integrating two 32-bit SH-4A CPU cores, the SH-Navi3 achieves a processing performance of 1,920 MIPS when operating at 533 MHz. Its 3-D graphics engine incorporates PowerVR SGX IP from 3-D graphics IP specialist Imagination Technologies Limited, and is said to enable polygon performance approximately twice that of PowerVR MBX, which is used in SH-Navi1 and SH-Navi2 devices. Renesas said the extra performance provides support not only for 3-D rendering in navigation applications but also for HMI and other multimedia applications that demand more colorful and realistic 3-D rendering.

The SH7776 also incorporates a 2-D and 3-D graphics processor for detailed map rendering and operation screens that are easier to use. Features include 2-D rendering functions such as bold-line rendering, 3-D rendering functions such as triangle 3-D rendering, for enhanced three-dimensionality, and texture mapping, for more realistic textures. Renesas said the graphics features make it possible to realize a detailed and high-quality GUI incorporating maps, icons, and menus as well as colorfully rendered 3-D objects (such as high-rise buildings) in maps. The SoC‘s distortion compensation module enables transformation into any shape of image data captured by a camera. For example, image data from a camera fitted with a fisheye lens could be used to generate a bird‘s-eye view of the periphery of the vehicle.

A two-channel, 16-bit dedicated bus interface operating at 533 MHz is available for connecting high-speed DDR3-SDRAM, enabling data transfer at up to 4.27 gigabytes per second. Both channels can be accessed at the same time. Dedicated PCI Express interface I/O of allows high-speed transfer of data at up to 250 megabytes per second to and from an external device equipped with a PCI Express interface.

On-chip peripheral modules include a serial ATA interface for high-speed connection to hard disks, an audio encoder, a USB 2.0 Host/Function interface, a TS interface for receiving terrestrial digital TV broadcasts, and a GPS baseband processing module.